28 lines
1016 B
C
28 lines
1016 B
C
#ifndef _LIBGCCVB_HW_H
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#define _LIBGCCVB_HW_H
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#include "types.h"
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extern u8* const HW_REGS;
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/***** Hardware Register Mnemonics *****/
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#define CCR 0x00 // Communication Control Register (0x0200 0000)
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#define CCSR 0x04 // COMCNT Control Register (0x0200 0004)
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#define CDTR 0x08 // Transmitted Data Register (0x0200 0008)
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#define CDRR 0x0C // Received Data Register (0x0200 000C)
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#define SDLR 0x10 // Serial Data Low Register (0x0200 0010)
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#define SDHR 0x14 // Serial Data High Register (0x0200 0014)
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#define TLR 0x18 // Timer Low Register (0x0200 0018)
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#define THR 0x1C // Timer High Register (0x0200 001C)
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#define TCR 0x20 // Timer Control Register (0x0200 0020)
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#define WCR 0x24 // Wait-state Control Register (0x0200 0024)
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#define SCR 0x28 // Serial Control Register (0x0200 0028)
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/********Cache Management***************/
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#define CACHE_ENABLE asm("mov 2,r1 \n ldsr r1,sr24": /* No Output */: /* No Input */: "r1" /* Reg r1 Used */)
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#define CACHE_DISABLE asm("ldsr r0,sr24")
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#endif |